Darren Chien, Positron AI
Darren Chien of Positron AI, managing director for Asia Pacific, APAC, discusses Positron's field-programmable gate array, FPGA-based Atlas product and its upcoming Asimov chip and Titan system within the context of robotics and artificial intelligence, AI infrastructure. Chien explains that inference is fundamentally an economics and energy-efficiency problem and they emphasize optimization for tokens per dollar and tokens per watt. They highlight the distinction between compute-bound prefill and memory-bound decode, the importance of context windows and Titan's air-cooled design that enables legacy enterprise deployment without costly retrofits. The conversation addresses memory capacity and memory bandwidth as critical factors for memory-optimized systems and for enterprise scaling across Taiwan, Korea, Japan and Singapore. This theCUBE Research conversation with hosts John Furrier and Gabe Olave occurs at the NYSE Wired AI Leaders Summit. The hosts discuss market competition and open models and underscore APAC's strategic role in silicon and supply chains.
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