Advancing AI 2026 | Prith Banerjee, Synopsys

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More from Advancing AI 2026

Prith Banerjee

SVP, Innovation

Synopsys

play_circle_outline Synopsys acquisition of Ansys enabling silicon-to-systems integration across industries

play_circle_outline Co-Design with Digital Twins: Synopsys ZeBu, HAPS, Fusion Compiler and PrimeTime for Chip-Software Systems

play_circle_outline AgentEngineer: AI agents and agent workflows automating EDA tasks and RTL creation

play_circle_outline Co-design collaboration between hyperscalers, data centers, and chipmakers (Meta example)

play_circle_outline AI and GPUs accelerating simulation and EDA runtimes via model-driven parallelism

play_circle_outline Cloud delivery of EDA and emulation (ZeBu Cloud), democratizing chip design for startups

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Prith Banerjee, Synopsys

Prith Banerjee

SVP, Innovation Synopsys

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(INTRO)

Dave Vellante

>> Hi everybody, welcome back to Moscone West. We're here covering AMD's Advancing AI. This is their biggest show ever, to my knowledge. We're tracking and reporting on the transformation of AMD from a chip company dominating as the number two competitor, and now biggest player in the CPU market worldwide, according to Lisa Su, but transforming into a systems company. Super excited to be here with Bob O'Donnell, my co -host, I'm Dave Vellante, and Prith Banerjee is here, multi -time CUBE guest, Senior Vice President of Innovation at Synopsys. Prith, great to see you again, wonderful to reconnect after all these years.

Dave Vellante

>> Great to see you,

Dave Vellante

>> thank you so much for inviting me back to theCUBE. You bet, I wonder if you could take us through, people know Synopsys as the electronic design automation company, made a major acquisition of Ansys last year, $35 billion. Help us understand the relationship between the two companies. You came in from the Ansys side. Lay it out for us, if you would.

Prith Banerjee

>> Absolutely. So, as you said, Synopsys was the leading electronic design automation and IP company. About a $6 billion revenue company, $4 billion in EDA, and $2 billion in IP. When you look at a chip today, Dave and Bob, they are very complex things, have hundreds of billions of transistors in them, and that is what Synopsys helps to build. Now increasingly these chips go inside systems, inside an automobile, inside a drone, inside an airplane. And so these systems are getting what we call intelligent systems. These are silicon powered, there's a chip inside them. They are software driven. So it is software-defined vehicle, software-defined car, software-defined drone, and it's AI-enabled. So in the world of intelligent systems, you have to model the system, and you have to model the chip. So the leading system modeling company was Ansys. I used to be CTO at Ansys. We are a $3 billion company. We had the best fluid solvers, mechanical solvers, electromagnetic solvers, chip solvers, photonic solvers. So by acquiring Ansys, with a combination of Synopsys and Ansys, now the vision is to be the leading provider of Silicon to Systems for customers across the five verticals. Automotive, aerospace, energy, industrials, and healthcare.

Dave Vellante

>> silicon design and manufacturing is just so complex. You guys are a critical part of the supply chain. People oftentimes don't think of software as part of the supply chain, but it's a vital instrument in terms of getting to market first, of course, U.S. competitiveness, et cetera. So I wonder if you could discuss the evolution of that complexity and how your portfolio helps address that.

Prith Banerjee

>> Yeah, so as I said, 20 years ago when you bought a car, that car was all mechanically powered. So you had mechanical steering, mechanical brakes, everything mechanical.

Dave Vellante

>> Yeah, we could all fix them ourselves.

Prith Banerjee

>> Yeah, exactly.

Dave Vellante

>> Open up the hood and start tinkering, go to the truck.

Prith Banerjee

>> Now, there is about 100 million lines of code on that car, right? So this car that runs by itself, autonomous car, right? There's just so much complexity in those control algorithms. But the interesting thing about software defined is, you ship a car with the software on it, but then, every six months, you can do an over-the-air update of that software and it becomes more intelligent with time, right? So the question is, this complexity, how can you, when it was just a mechanical car, it was easy to design, verify the thing, and once you ship it, that car did not change. Now the car keeps changing, and you have to always verify the complexity of this thing. So the complexity have become, you have to let co-design of the software happen while the chip is being designed. It takes two years to design the next MI455X. While that chip is being designed at AMD, the people who are writing the software on it are starting to write the software. And then that software will be software to brake the car, right? So the braking of the car, the people who are actually making the brakes and the steering and so on at Ford or GM, they're making those mechanical parts and you're simulating them with Ansys tools. So how do you co-design, concurrently design and simulate all of those things, that's the complexity. So with Synopsys today, what we can do is, we can take 100 million lines of code that you run on the thing, on a chip, for which you have a Verilog description of the chip. That Verilog or VHDL description, you can emulate on our platform called ZeBu and HAPS. So essentially the software developers, they don't have the chip in front of them, they can start writing the software and emulating it on our HAPS and ZeBu platform. Once they do this, then they start designing the chip. This is a 200 billion, 300 billion transistor chip that Lisa just explained, the MI455X. You're doing this. That is being designed, and as part of it, we have the entire design flow from Fusion Compiler to do the design, PrimeTime to do the sign-offs and so on. But then, as this chip is going inside the car, all the car parts, the engine, the steering, etc. are designed by the Ansys tools. So we can build a digital twin of that entire hardware, software, combined thing before a single thing have been fabricated.

Dave Vellante

>> That's amazing work.And so then you can dramatically cut the time to tape out and time to market.

Prith Banerjee

>> Well and the other thing is just the complexity of designing a single chip have gotten to be, like you said, with that many billions of transistors, it's just overwhelming. So it's one of the best applications you can imagine of applying AI to achieve a task. Right, at the end of the day, it's about AI helping people achieve a very difficult task. Well there's hardly anything more difficult these days than designing a chip. it used to be that all rocket scientists were considered the leading edge smart people, now it's chip designers, right? I will tell you, I will date myself, but I started my career in academia. I used to be a professor at the University of Illinois, Northwestern, I used to teach students how to design VLSI chips. At that time, those chips had maybe 100 ,000 transistors using custom design. Then they went to a million transistors, wow, it's a big deal. Started at 10 micron, right? 6 micron, et cetera, right? Then they went to a million transistors, 10 million, 100 million, billion transistors, wow, billion transistors. Then we went to 10 billion. We had 200 billion. Today, Lisa announced 300 billion. Cerebras was on stage, they have 2 .7 trillion transistors. Crazy. Can you imagine designing such a complex chip? And these chips used to be designed, maybe it took three years, four years to design. Now, Lisa is talking about a chip every year. Soon she'll talk about a chip every six months. So what is happening is the complexity of these chips and systems is increasing, and the pace of innovation is getting shorter and shorter. a new car used to come out every seven years, then four years, then two years. How do you handle the complexity? You cannot have hire millions of engineers. That's where AI comes in. So what we have done at Synopsys is develop this technology of AgentEngineer, Lisa talked about agentic workflows and so everybody's using it. We have embraced the concept of agentic AI workflows to take our tools and the tools were being used by human engineers, now for every one of the tools we have come up with AI agents, an agent to do RTL creation, agent to do test bench assistant and so on. And so these agents work with human engineers, they collaborate with the multi -agent workflows, and that is how we are enabling AMD and other chip companies to tame the complexity. And the other thing is, I think a lot of people don't realize how much is involved in chip design. It's not just designing the chip, then it's verifying and testing and going through all the various steps that have to be taken and, does this section communicate properly with this section and all of those kinds of things. as we moved into chiplet designs, obviously that becomes increasingly important as well. So it's hey, we've got this one chip and this other little chiplet piece, now we have to make sure all the interconnect between all of them is as efficient as possible. So there's just so many steps to that chip design process that I think most people don't really think about. And that's, again, part of what Synopsys is doing as well is helping bridge all of those various gaps and fulfilling many different tasks. And actually, I'm glad you mentioned that because Lisa mentioned this 300 billion transistor chip using chiplet technology. What is a chiplet? These chips are so big. 300 billion transistors, if you put them on a single die, there'll be so many failures in it, you will not have a single die that will work. So therefore, they break it up into smaller and smaller chiplets, each having maybe 10 million transistors, 100 million transistors, right? And you take these chiplets and you assemble them together. Think of them as 3D chiplets or 3D ICs. Now, each of these chiplets, they will generate maybe 10 watts, 100 watts of power. So it's generating heat. Now you have, in the past, you had only one chip. It was easy to cool that chip because we figured out how to do the cooling. Now you have chips that are on top of other chips, on top of other chips. You have to figure out how to do thermal modeling of these chips. As the chips become hotter, you have expansion. So because of expansion, you are having stress strain, mechanical stress strain, where you can crack. In order to prevent that, you have to do cooling. You have to do air cooling, water cooling, all the air cooling, water cooling technology that you hear from HPE and so on, right? So this is where the Ansys tools came in, because we are the leading tool for thermal modeling, leading tool for structural modeling, leading tool for fluids modeling, so we can now do co-design of these 3D ICs and chiplets. The designs that came out, the MI455, was done by a 3DIC Compiler. By tying that compiler, these EDA tools, with the thermal analysis, stress analysis, fluids analysis, all that. This is what we call co-design. And I want you to understand the difference between over -design and co-design. When you are looking at a bridge, oftentimes people just put more concrete in it because they don't know at what point it may crack. what, I'll do a factor of five more concrete just to be safe.

Dave Vellante

>> Have some headroom, yeah.

Prith Banerjee

>> If you put a factor of five, more transistors, factor of five, there'll be so much power. As it is, these data centers take three gigawatts of power. You'll go to 20 gigawatts of power. You cannot over design. So we at Synopsys are enabling our customers to do co-design, which is simultaneously in the thermal, with the electromagnetic, with the signal integrity, power integrity, just right to make it work.

Dave Vellante

>> The tolerances are so, so thin. It's funny, you're talking about the chiplets. I was having this conversation with Andrew Feldman a while ago, how do you get yields out of that big giant chip? You explained how they make it redundant, but I want to ask you.

Prith Banerjee

>> AMD is actually our customer, so I can talk about how we work.

Dave Vellante

>> Oh, okay, it's quite fascinating what they do. Because I said, well, there's a trade -off. How do you get high yields out of that? And so you guys work with them, and of course they were up on stage today, but this co-design philosophy that you're talking about is so critical to the industry to keep pace. We saw Moore's Law start to tail off. And now, co-design is how we get this annual cadence. Of course, AMD seems to have a different philosophy on co-design, we've been talking about this, than NVIDIA, they kind of co-design it in -house and put it out there, where AMD's doing it with the ecosystem. Different philosophies, different ways to skin the cat, as I say.

Prith Banerjee

>> Yeah, exactly. In technology. But Lisa actually brought Janardhan, Santosh Janardhan from Meta, and they talked about when Meta is designing their 2028, the kind of data centers they'll need, they're saying, oh, this is the kind of chip I need. So they are co -designing from the data center to the chip. We are enabling AMD to do co-design of their chiplets with their things. So imagine a co-design, literally, with the kinds of tools that we have at Ansys, we can do the co-design with the data center also. So that's the part that we are saying, that in this world, we are allowing our designers from Silicon to Systems to data centers at scale to do what is called shift left before designing a single chip, single system, single memory, whatever, we can do what-if scenarios with digital twins with all the power and cooling and so on. So that's an extra...

Dave Vellante

>> So when we saw Moore's Law starting to taper, obviously there were concerns, well, what's going to happen to innovation in the industry? And of course there were new techniques and okay, fine. Now we're in this extreme co-design phase, annual cadence. What you guys do is critical, vital, to continuing that cadence. How much, from a technologist perspective, how much runway do we have here? You hear folks developing monolithic chips, SRAM taking up more and more of the real estate, and so the chiplet designs give you greater flexibility. How much runway do we have as an industry? because it's vital that we can continue this rapid pace. It's actually compressing.

Prith Banerjee

>> So I will tell you,I worked in the world of EDA for the last 40 years. I was in academia, as I said. I was involved with the early algorithms for placement and routing while I was in Illinois, right? Developing all these algorithms with all these companies that have come in. This software was written on single processors, right? You have an x86 or a Sun UltraSPARC or whatever, right? On your single processor. And you had maybe 64 megabytes of RAM on that. So the early work on simulation from Ansys and the early work on EDA, placement, routing, synthesis tools, were all done for a single processor. As the complexity of these chips have increased, the run times have gone through the roof. And my early research at Illinois was parallel algorithms for EDA. This is what I used to do, right? So you take a thing that is taking a thousand hours, using a hundred processors, how do you make it faster? So in this world, the way technology innovation happened is because of complexity, people went HPC, high performance computing. First they went on to shared memory with multi -threading, then they went to message passing, but with message passing they were only doing maybe not a thousand, say a hundred to two hundred processors. with GPUs, the technology that now Lisa is talking about, right, you have 16 ,000 cores all running things in what is called SIMD, single instruction multiple data. The programming model have changed. So we had to rewrite, I am supervising the rewrite of algorithms taking our Fluent software, how do you rewrite it to take advantage of one GPU? Then make it run in multi -GPUs. take a structural solver, make it run on multi -GPUs. So in my presentation yesterday, I talked about how we took each of the solvers, made them run on multi -GPUs. EDA tools, PrimeTime tools, everything is now running in parallel fine -grain to take advantage of complexity. Something that used to take 10 ,000 hours to run can run in a matter of minutes. That's how we can deal with this complexity. Otherwise, on a single processor, on your Mac, it would not run.

Dave Vellante

>> But it's not just simply, stacking cores, brute forcing it, it's the algorithms, it's the efficiency. So, HPC is one way.

Prith Banerjee

>> The other way is with AI. What we have done with SimAI, the tools that we have from Ansys is, you take a Fluent application, which is fluid's application, you give it an initial condition, boundary condition, and you run Fluent. Here is an input, here is an output. For this input -output, you start with some random weights in a neural network, and you try to guess it. there'll be an error in it, based on the error, you will set your weights so that the error is zero. Then you train it with another input, another input. After maybe a thousand runs, this AI system learns the physics of fluids and so on. Now you give it another CAD, another input condition, it gives you an output in a matter of seconds. That is speed up through AI. So we have sped up our algorithms with GPUs, we have sped it up with AI, and these AI models, again run on GPUs. So it's an incredible thing that is happening, and you have not asked this, but in the future we're going to do this with quantum.

Dave Vellante

>> So, how about it? So, I go back to the early disk drive days where it was, how much lower can they fly the head? solve that problem. But so, if I understand it correctly, you see at least no end to the runway in the foreseeable future, right?

Prith Banerjee

>> We just keep going. you give us more complexity in runtimes, we have figured out a way to make it faster by leveraging GPUs for fine -grained parallelism, and by the way, GPUs, have a limitation with the amount of memory they have. They may have 32 gigabytes of memory. We have figured out the problem. You give me a problem with 10 terabytes, we'll chop it up into a thousand sections, each with 32 gigabytes, so it'll fit, and then we have the algorithms to run it. So that is what is called brute force parallelism. Then with AI, we have this added factor of parallelism. So we make it go faster. The complexity we are addressing with these agent workflows, right? Because it is so complex now with AgentEngineer. The human engineers, instead of a million engineers hired at AMD, the same 10 ,000 engineers that Lisa have, working with 90 ,000 AgentEngineer from Synopsys, will be able to do that job.

Dave Vellante

>> And as the AI gets smarter and more capable, it'll take you to new frontiers.Well, and the other thing,

Prith Banerjee

>> and I was going to bring this up, slightly different but related topic that was part of the news you guys had today is, we're seeing more and more companies getting involved with chip design, right? It used to be it was only AMD and only Intel, and very few companies, but now you've got all the hyperscalers, a whole bunch of other companies, a whole bunch of startups doing chip design, And automotive companies, everybody's doing chip design. And so what have also, we're seeing happen is figuring out, and I know you guys are working with Microsoft to create an instance within Azure and it runs on AMD Silicon, to run your software so that other third party companies can do chip design. And that's opening up a whole new world.

Prith Banerjee

>> So can you tell us a little bit more about that?

Prith Banerjee

>> Absolutely, in fact, I was in a very important executive meeting with Microsoft yesterday. We were talking about this exact thing. So our agentic workflow on the cloud is actually running on Azure. And again, we are trying to take advantage of the GPUs from AMD to run on it, and powered by AI. So all the things that I just talked about, now being available to not only the big players like the AMDs and Intel's, but also smaller companies, startups. We have this great startup program that we have launched that rather than buying these really ridiculously expensive licenses from Synopsys, they can use the licenses on the cloud. Not only that, I just talked about HAPS and ZeBu. These are very, very expensive boxes. Tens of millions of dollars. You can now have ZeBu Cloud essentially running it on the cloud, so all the software, EDA software on the cloud, simulation software Ansys on the cloud, ZeBu on the cloud, this is how the new world will happen, which will expand the use of these EDA and systems tools to hundreds of startups. We at Synopsys used to have maybe 200 customers. At Ansys as CTO, I used to talk to 10 ,000 customers. And it's those 10 ,000 customers that we are going to help solve the problem of Silicon to Systems.

Prith Banerjee

>> Right, yeah, to me that's what's fascinating

Prith Banerjee

>> is that the expansion of how many different companies are driving silicon. it's, we all know it's being used in everything from toys to, to, everything in our lives increasingly is being powered by silicon, and yet you're going to have more specialized tools being created, so it's a great way to make it available to a wider audience.

Dave Vellante

>> The cost of designing silicon have come way down.

Prith Banerjee

>> Yes. and the ease of use. Let me kind of hint at it with the agentic AI, but when you design a chip, Dave and Bob, these are really complicated things. You have to know how to write register transfer level, VHDL, Verilog, learning that is a skill. I used to teach students how to write RTL. With AI, just like you can say with a prompt on ChatGPT, write me a poem, right? Vamsi showed writing a poem, right? So you can tell these AI tools, write a spec. In English you're saying, hey, I would like to design a chip with the specification for the MI455X, in English, right? And based on prior designs, the technology is moving so much that we have things called spec to RTL. From that spec, the RTL will come out. So this is becoming so easy, anybody can do it, right? And so we are democratizing the process of Silicon to Systems design.

Dave Vellante

>> You brought up quantum.

Dave Vellante

>> I brought up quantum.

Dave Vellante

>> You brought up quantum. That's the next frontier that will take us beyond where we are today. what I'm going to ask you?

Dave Vellante

>> Yes.

Dave Vellante

>> it was 2011 when we had the epic clip of you explaining. And I know you didn't want to talk about it, but I'm going to ask you to do it. Because people, I think, need to understand the power.

Dave Vellante

>> Sure,

Dave Vellante

>> and so, this is another master class, I just love it, but you were explaining to me, would you be willing to do it, and share? The Quantum 101, explaining qubits. Could you do it for theCUBE audience?

Prith Banerjee

>> So let me tell the audience what he was talking about, when I was director of HPE Labs in 2011, he asked me, because I was talking about the world creating 100 exabytes of data, how much is an exabyte? I said, well, how much a megabyte is, right? A kilobyte. 1 ,000 kilobytes is a megabyte. 1 ,000 megabytes is a gigabyte. 1 ,000 gigabytes is a terabyte. So I went all the way to 1 ,000, 1 ,000, 1 ,000. It became an exabyte. So I got all excited explaining what an exabyte is. And we turned it into an epic clip. I will tell you the same thing about quantum.

Prith Banerjee

>> Great. Tell us.

Prith Banerjee

>> So with a normal computer, you have a bit, which is 1 or a 0. It's either 1 or a 0. With a qubit, quantum bits, it is zero and one at the same time. It's like there is a cat, there is no cat, right? So if you have two qubits, it's a zero, zero, zero, one, one, zero, one, one at the same time. If you have 10 qubits, it is 1024 states at the same time. If you have 20 qubits, it's a million states at the same time. If you have 30 qubits, it's a billion. if you have 40 qubits, you have a trillion. Can you imagine some of the things that are running at 100 ,000 hours, if I could speed it up a trillion times, what it will do? And at 50 qubits, you won't even be able to say what it is. Quadrillion and so on, right? So my point is, quantum allows you the potential for exponential compute capability, And this is what we are working on in my city office, taking a fluids problem, which takes hours and hours to run, on a quantum computer with lattice Boltzmann method. We are working with the likes of IonQ to make it run, or electromagnetic simulation with Hamiltonian. We are working with the likes of IBM, or the cell placement problem. So I'm telling you, it is so fascinating. The AI journey, people are talking about AI. till 2021, nobody actually cared about AI until ChatGPT happened. And oh my God, AI happened. I am telling you, there will be a ChatGPT moment for Quantum, everybody will start talking about Quantum, but Prith Banerjee at Synopsys will have started working on Quantum, so far ahead of everybody else.

Dave Vellante

>> Thank you so much for doing that. Simultaneous states that boggle the mind. Yes. Prith, so great to see you again.Thank you so much for coming on.

Prith Banerjee

>> Thank you, really appreciate it.

Dave Vellante

>> And thanks for all the good work that Synopsys is doing in the industry and making us competitive and really appreciate your time and your insights. And thank you for watching. This is Dave Vellante for Bob O'Donnell. You're watching theCUBE's live coverage of AMD's Advancing AI here at Moscone West 2026. We'll be right back right after this short break.

Prith Banerjee, Synopsys

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(INTRO)

Dave Vellante

>> Hi everybody, welcome back to Moscone West. We're here covering AMD's Advancing AI. This is their biggest show ever, to my knowledge. We're tracking and reporting on the transformation of AMD from a chip company dominating as the number two competitor, and now biggest player in the CPU market worldwide, according to Lisa Su, but transforming into a systems company. Super excited to be here with Bob O'Donnell, my co -host, I'm Dave Vellante, and Prith Banerjee is here, multi -time CUBE guest, Senior Vice President of Innovation at Synopsys. Prith, great to see you again, wonderful to reconnect after all these years.

Dave Vellante

>> Great to see you,

Dave Vellante

>> thank you so much for inviting me back to theCUBE. You bet, I wonder if you could take us through, people know Synopsys as the electronic design automation company, made a major acquisition of Ansys last year, $35 billion. Help us understand the relationship between the two companies. You came in from the Ansys side. Lay it out for us, if you would.

Prith Banerjee

>> Absolutely. So, as you said, Synopsys was the leading electronic design automation and IP company. About a $6 billion revenue company, $4 billion in EDA, and $2 billion in IP. When you look at a chip today, Dave and Bob, they are very complex things, have hundreds of billions of transistors in them, and that is what Synopsys helps to build. Now increasingly these chips go inside systems, inside an automobile, inside a drone, inside an airplane. And so these systems are getting what we call intelligent systems. These are silicon powered, there's a chip inside them. They are software driven. So it is software-defined vehicle, software-defined car, software-defined drone, and it's AI-enabled. So in the world of intelligent systems, you have to model the system, and you have to model the chip. So the leading system modeling company was Ansys. I used to be CTO at Ansys. We are a $3 billion company. We had the best fluid solvers, mechanical solvers, electromagnetic solvers, chip solvers, photonic solvers. So by acquiring Ansys, with a combination of Synopsys and Ansys, now the vision is to be the leading provider of Silicon to Systems for customers across the five verticals. Automotive, aerospace, energy, industrials, and healthcare.

Dave Vellante

>> silicon design and manufacturing is just so complex. You guys are a critical part of the supply chain. People oftentimes don't think of software as part of the supply chain, but it's a vital instrument in terms of getting to market first, of course, U.S. competitiveness, et cetera. So I wonder if you could discuss the evolution of that complexity and how your portfolio helps address that.

Prith Banerjee

>> Yeah, so as I said, 20 years ago when you bought a car, that car was all mechanically powered. So you had mechanical steering, mechanical brakes, everything mechanical.

Dave Vellante

>> Yeah, we could all fix them ourselves.

Prith Banerjee

>> Yeah, exactly.

Dave Vellante

>> Open up the hood and start tinkering, go to the truck.

Prith Banerjee

>> Now, there is about 100 million lines of code on that car, right? So this car that runs by itself, autonomous car, right? There's just so much complexity in those control algorithms. But the interesting thing about software defined is, you ship a car with the software on it, but then, every six months, you can do an over-the-air update of that software and it becomes more intelligent with time, right? So the question is, this complexity, how can you, when it was just a mechanical car, it was easy to design, verify the thing, and once you ship it, that car did not change. Now the car keeps changing, and you have to always verify the complexity of this thing. So the complexity have become, you have to let co-design of the software happen while the chip is being designed. It takes two years to design the next MI455X. While that chip is being designed at AMD, the people who are writing the software on it are starting to write the software. And then that software will be software to brake the car, right? So the braking of the car, the people who are actually making the brakes and the steering and so on at Ford or GM, they're making those mechanical parts and you're simulating them with Ansys tools. So how do you co-design, concurrently design and simulate all of those things, that's the complexity. So with Synopsys today, what we can do is, we can take 100 million lines of code that you run on the thing, on a chip, for which you have a Verilog description of the chip. That Verilog or VHDL description, you can emulate on our platform called ZeBu and HAPS. So essentially the software developers, they don't have the chip in front of them, they can start writing the software and emulating it on our HAPS and ZeBu platform. Once they do this, then they start designing the chip. This is a 200 billion, 300 billion transistor chip that Lisa just explained, the MI455X. You're doing this. That is being designed, and as part of it, we have the entire design flow from Fusion Compiler to do the design, PrimeTime to do the sign-offs and so on. But then, as this chip is going inside the car, all the car parts, the engine, the steering, etc. are designed by the Ansys tools. So we can build a digital twin of that entire hardware, software, combined thing before a single thing have been fabricated.

Dave Vellante

>> That's amazing work.And so then you can dramatically cut the time to tape out and time to market.

Prith Banerjee

>> Well and the other thing is just the complexity of designing a single chip have gotten to be, like you said, with that many billions of transistors, it's just overwhelming. So it's one of the best applications you can imagine of applying AI to achieve a task. Right, at the end of the day, it's about AI helping people achieve a very difficult task. Well there's hardly anything more difficult these days than designing a chip. it used to be that all rocket scientists were considered the leading edge smart people, now it's chip designers, right? I will tell you, I will date myself, but I started my career in academia. I used to be a professor at the University of Illinois, Northwestern, I used to teach students how to design VLSI chips. At that time, those chips had maybe 100 ,000 transistors using custom design. Then they went to a million transistors, wow, it's a big deal. Started at 10 micron, right? 6 micron, et cetera, right? Then they went to a million transistors, 10 million, 100 million, billion transistors, wow, billion transistors. Then we went to 10 billion. We had 200 billion. Today, Lisa announced 300 billion. Cerebras was on stage, they have 2 .7 trillion transistors. Crazy. Can you imagine designing such a complex chip? And these chips used to be designed, maybe it took three years, four years to design. Now, Lisa is talking about a chip every year. Soon she'll talk about a chip every six months. So what is happening is the complexity of these chips and systems is increasing, and the pace of innovation is getting shorter and shorter. a new car used to come out every seven years, then four years, then two years. How do you handle the complexity? You cannot have hire millions of engineers. That's where AI comes in. So what we have done at Synopsys is develop this technology of AgentEngineer, Lisa talked about agentic workflows and so everybody's using it. We have embraced the concept of agentic AI workflows to take our tools and the tools were being used by human engineers, now for every one of the tools we have come up with AI agents, an agent to do RTL creation, agent to do test bench assistant and so on. And so these agents work with human engineers, they collaborate with the multi -agent workflows, and that is how we are enabling AMD and other chip companies to tame the complexity. And the other thing is, I think a lot of people don't realize how much is involved in chip design. It's not just designing the chip, then it's verifying and testing and going through all the various steps that have to be taken and, does this section communicate properly with this section and all of those kinds of things. as we moved into chiplet designs, obviously that becomes increasingly important as well. So it's hey, we've got this one chip and this other little chiplet piece, now we have to make sure all the interconnect between all of them is as efficient as possible. So there's just so many steps to that chip design process that I think most people don't really think about. And that's, again, part of what Synopsys is doing as well is helping bridge all of those various gaps and fulfilling many different tasks. And actually, I'm glad you mentioned that because Lisa mentioned this 300 billion transistor chip using chiplet technology. What is a chiplet? These chips are so big. 300 billion transistors, if you put them on a single die, there'll be so many failures in it, you will not have a single die that will work. So therefore, they break it up into smaller and smaller chiplets, each having maybe 10 million transistors, 100 million transistors, right? And you take these chiplets and you assemble them together. Think of them as 3D chiplets or 3D ICs. Now, each of these chiplets, they will generate maybe 10 watts, 100 watts of power. So it's generating heat. Now you have, in the past, you had only one chip. It was easy to cool that chip because we figured out how to do the cooling. Now you have chips that are on top of other chips, on top of other chips. You have to figure out how to do thermal modeling of these chips. As the chips become hotter, you have expansion. So because of expansion, you are having stress strain, mechanical stress strain, where you can crack. In order to prevent that, you have to do cooling. You have to do air cooling, water cooling, all the air cooling, water cooling technology that you hear from HPE and so on, right? So this is where the Ansys tools came in, because we are the leading tool for thermal modeling, leading tool for structural modeling, leading tool for fluids modeling, so we can now do co-design of these 3D ICs and chiplets. The designs that came out, the MI455, was done by a 3DIC Compiler. By tying that compiler, these EDA tools, with the thermal analysis, stress analysis, fluids analysis, all that. This is what we call co-design. And I want you to understand the difference between over -design and co-design. When you are looking at a bridge, oftentimes people just put more concrete in it because they don't know at what point it may crack. what, I'll do a factor of five more concrete just to be safe.

Dave Vellante

>> Have some headroom, yeah.

Prith Banerjee

>> If you put a factor of five, more transistors, factor of five, there'll be so much power. As it is, these data centers take three gigawatts of power. You'll go to 20 gigawatts of power. You cannot over design. So we at Synopsys are enabling our customers to do co-design, which is simultaneously in the thermal, with the electromagnetic, with the signal integrity, power integrity, just right to make it work.

Dave Vellante

>> The tolerances are so, so thin. It's funny, you're talking about the chiplets. I was having this conversation with Andrew Feldman a while ago, how do you get yields out of that big giant chip? You explained how they make it redundant, but I want to ask you.

Prith Banerjee

>> AMD is actually our customer, so I can talk about how we work.

Dave Vellante

>> Oh, okay, it's quite fascinating what they do. Because I said, well, there's a trade -off. How do you get high yields out of that? And so you guys work with them, and of course they were up on stage today, but this co-design philosophy that you're talking about is so critical to the industry to keep pace. We saw Moore's Law start to tail off. And now, co-design is how we get this annual cadence. Of course, AMD seems to have a different philosophy on co-design, we've been talking about this, than NVIDIA, they kind of co-design it in -house and put it out there, where AMD's doing it with the ecosystem. Different philosophies, different ways to skin the cat, as I say.

Prith Banerjee

>> Yeah, exactly. In technology. But Lisa actually brought Janardhan, Santosh Janardhan from Meta, and they talked about when Meta is designing their 2028, the kind of data centers they'll need, they're saying, oh, this is the kind of chip I need. So they are co -designing from the data center to the chip. We are enabling AMD to do co-design of their chiplets with their things. So imagine a co-design, literally, with the kinds of tools that we have at Ansys, we can do the co-design with the data center also. So that's the part that we are saying, that in this world, we are allowing our designers from Silicon to Systems to data centers at scale to do what is called shift left before designing a single chip, single system, single memory, whatever, we can do what-if scenarios with digital twins with all the power and cooling and so on. So that's an extra...

Dave Vellante

>> So when we saw Moore's Law starting to taper, obviously there were concerns, well, what's going to happen to innovation in the industry? And of course there were new techniques and okay, fine. Now we're in this extreme co-design phase, annual cadence. What you guys do is critical, vital, to continuing that cadence. How much, from a technologist perspective, how much runway do we have here? You hear folks developing monolithic chips, SRAM taking up more and more of the real estate, and so the chiplet designs give you greater flexibility. How much runway do we have as an industry? because it's vital that we can continue this rapid pace. It's actually compressing.

Prith Banerjee

>> So I will tell you,I worked in the world of EDA for the last 40 years. I was in academia, as I said. I was involved with the early algorithms for placement and routing while I was in Illinois, right? Developing all these algorithms with all these companies that have come in. This software was written on single processors, right? You have an x86 or a Sun UltraSPARC or whatever, right? On your single processor. And you had maybe 64 megabytes of RAM on that. So the early work on simulation from Ansys and the early work on EDA, placement, routing, synthesis tools, were all done for a single processor. As the complexity of these chips have increased, the run times have gone through the roof. And my early research at Illinois was parallel algorithms for EDA. This is what I used to do, right? So you take a thing that is taking a thousand hours, using a hundred processors, how do you make it faster? So in this world, the way technology innovation happened is because of complexity, people went HPC, high performance computing. First they went on to shared memory with multi -threading, then they went to message passing, but with message passing they were only doing maybe not a thousand, say a hundred to two hundred processors. with GPUs, the technology that now Lisa is talking about, right, you have 16 ,000 cores all running things in what is called SIMD, single instruction multiple data. The programming model have changed. So we had to rewrite, I am supervising the rewrite of algorithms taking our Fluent software, how do you rewrite it to take advantage of one GPU? Then make it run in multi -GPUs. take a structural solver, make it run on multi -GPUs. So in my presentation yesterday, I talked about how we took each of the solvers, made them run on multi -GPUs. EDA tools, PrimeTime tools, everything is now running in parallel fine -grain to take advantage of complexity. Something that used to take 10 ,000 hours to run can run in a matter of minutes. That's how we can deal with this complexity. Otherwise, on a single processor, on your Mac, it would not run.

Dave Vellante

>> But it's not just simply, stacking cores, brute forcing it, it's the algorithms, it's the efficiency. So, HPC is one way.

Prith Banerjee

>> The other way is with AI. What we have done with SimAI, the tools that we have from Ansys is, you take a Fluent application, which is fluid's application, you give it an initial condition, boundary condition, and you run Fluent. Here is an input, here is an output. For this input -output, you start with some random weights in a neural network, and you try to guess it. there'll be an error in it, based on the error, you will set your weights so that the error is zero. Then you train it with another input, another input. After maybe a thousand runs, this AI system learns the physics of fluids and so on. Now you give it another CAD, another input condition, it gives you an output in a matter of seconds. That is speed up through AI. So we have sped up our algorithms with GPUs, we have sped it up with AI, and these AI models, again run on GPUs. So it's an incredible thing that is happening, and you have not asked this, but in the future we're going to do this with quantum.

Dave Vellante

>> So, how about it? So, I go back to the early disk drive days where it was, how much lower can they fly the head? solve that problem. But so, if I understand it correctly, you see at least no end to the runway in the foreseeable future, right?

Prith Banerjee

>> We just keep going. you give us more complexity in runtimes, we have figured out a way to make it faster by leveraging GPUs for fine -grained parallelism, and by the way, GPUs, have a limitation with the amount of memory they have. They may have 32 gigabytes of memory. We have figured out the problem. You give me a problem with 10 terabytes, we'll chop it up into a thousand sections, each with 32 gigabytes, so it'll fit, and then we have the algorithms to run it. So that is what is called brute force parallelism. Then with AI, we have this added factor of parallelism. So we make it go faster. The complexity we are addressing with these agent workflows, right? Because it is so complex now with AgentEngineer. The human engineers, instead of a million engineers hired at AMD, the same 10 ,000 engineers that Lisa have, working with 90 ,000 AgentEngineer from Synopsys, will be able to do that job.

Dave Vellante

>> And as the AI gets smarter and more capable, it'll take you to new frontiers.Well, and the other thing,

Prith Banerjee

>> and I was going to bring this up, slightly different but related topic that was part of the news you guys had today is, we're seeing more and more companies getting involved with chip design, right? It used to be it was only AMD and only Intel, and very few companies, but now you've got all the hyperscalers, a whole bunch of other companies, a whole bunch of startups doing chip design, And automotive companies, everybody's doing chip design. And so what have also, we're seeing happen is figuring out, and I know you guys are working with Microsoft to create an instance within Azure and it runs on AMD Silicon, to run your software so that other third party companies can do chip design. And that's opening up a whole new world.

Prith Banerjee

>> So can you tell us a little bit more about that?

Prith Banerjee

>> Absolutely, in fact, I was in a very important executive meeting with Microsoft yesterday. We were talking about this exact thing. So our agentic workflow on the cloud is actually running on Azure. And again, we are trying to take advantage of the GPUs from AMD to run on it, and powered by AI. So all the things that I just talked about, now being available to not only the big players like the AMDs and Intel's, but also smaller companies, startups. We have this great startup program that we have launched that rather than buying these really ridiculously expensive licenses from Synopsys, they can use the licenses on the cloud. Not only that, I just talked about HAPS and ZeBu. These are very, very expensive boxes. Tens of millions of dollars. You can now have ZeBu Cloud essentially running it on the cloud, so all the software, EDA software on the cloud, simulation software Ansys on the cloud, ZeBu on the cloud, this is how the new world will happen, which will expand the use of these EDA and systems tools to hundreds of startups. We at Synopsys used to have maybe 200 customers. At Ansys as CTO, I used to talk to 10 ,000 customers. And it's those 10 ,000 customers that we are going to help solve the problem of Silicon to Systems.

Prith Banerjee

>> Right, yeah, to me that's what's fascinating

Prith Banerjee

>> is that the expansion of how many different companies are driving silicon. it's, we all know it's being used in everything from toys to, to, everything in our lives increasingly is being powered by silicon, and yet you're going to have more specialized tools being created, so it's a great way to make it available to a wider audience.

Dave Vellante

>> The cost of designing silicon have come way down.

Prith Banerjee

>> Yes. and the ease of use. Let me kind of hint at it with the agentic AI, but when you design a chip, Dave and Bob, these are really complicated things. You have to know how to write register transfer level, VHDL, Verilog, learning that is a skill. I used to teach students how to write RTL. With AI, just like you can say with a prompt on ChatGPT, write me a poem, right? Vamsi showed writing a poem, right? So you can tell these AI tools, write a spec. In English you're saying, hey, I would like to design a chip with the specification for the MI455X, in English, right? And based on prior designs, the technology is moving so much that we have things called spec to RTL. From that spec, the RTL will come out. So this is becoming so easy, anybody can do it, right? And so we are democratizing the process of Silicon to Systems design.

Dave Vellante

>> You brought up quantum.

Dave Vellante

>> I brought up quantum.

Dave Vellante

>> You brought up quantum. That's the next frontier that will take us beyond where we are today. what I'm going to ask you?

Dave Vellante

>> Yes.

Dave Vellante

>> it was 2011 when we had the epic clip of you explaining. And I know you didn't want to talk about it, but I'm going to ask you to do it. Because people, I think, need to understand the power.

Dave Vellante

>> Sure,

Dave Vellante

>> and so, this is another master class, I just love it, but you were explaining to me, would you be willing to do it, and share? The Quantum 101, explaining qubits. Could you do it for theCUBE audience?

Prith Banerjee

>> So let me tell the audience what he was talking about, when I was director of HPE Labs in 2011, he asked me, because I was talking about the world creating 100 exabytes of data, how much is an exabyte? I said, well, how much a megabyte is, right? A kilobyte. 1 ,000 kilobytes is a megabyte. 1 ,000 megabytes is a gigabyte. 1 ,000 gigabytes is a terabyte. So I went all the way to 1 ,000, 1 ,000, 1 ,000. It became an exabyte. So I got all excited explaining what an exabyte is. And we turned it into an epic clip. I will tell you the same thing about quantum.

Prith Banerjee

>> Great. Tell us.

Prith Banerjee

>> So with a normal computer, you have a bit, which is 1 or a 0. It's either 1 or a 0. With a qubit, quantum bits, it is zero and one at the same time. It's like there is a cat, there is no cat, right? So if you have two qubits, it's a zero, zero, zero, one, one, zero, one, one at the same time. If you have 10 qubits, it is 1024 states at the same time. If you have 20 qubits, it's a million states at the same time. If you have 30 qubits, it's a billion. if you have 40 qubits, you have a trillion. Can you imagine some of the things that are running at 100 ,000 hours, if I could speed it up a trillion times, what it will do? And at 50 qubits, you won't even be able to say what it is. Quadrillion and so on, right? So my point is, quantum allows you the potential for exponential compute capability, And this is what we are working on in my city office, taking a fluids problem, which takes hours and hours to run, on a quantum computer with lattice Boltzmann method. We are working with the likes of IonQ to make it run, or electromagnetic simulation with Hamiltonian. We are working with the likes of IBM, or the cell placement problem. So I'm telling you, it is so fascinating. The AI journey, people are talking about AI. till 2021, nobody actually cared about AI until ChatGPT happened. And oh my God, AI happened. I am telling you, there will be a ChatGPT moment for Quantum, everybody will start talking about Quantum, but Prith Banerjee at Synopsys will have started working on Quantum, so far ahead of everybody else.

Dave Vellante

>> Thank you so much for doing that. Simultaneous states that boggle the mind. Yes. Prith, so great to see you again.Thank you so much for coming on.

Prith Banerjee

>> Thank you, really appreciate it.

Dave Vellante

>> And thanks for all the good work that Synopsys is doing in the industry and making us competitive and really appreciate your time and your insights. And thank you for watching. This is Dave Vellante for Bob O'Donnell. You're watching theCUBE's live coverage of AMD's Advancing AI here at Moscone West 2026. We'll be right back right after this short break.